Prof. Jesus Labarta

Barcelona Supercomputing Center, Spain

Jesus Labarta is full professor on Computer Architecture at the Technical University of Catalonia (UPC) since 1990.
 
Since 2005 he is responsible of the Computer Science Research Department within the Barcelona Supercomputing Center (BSC). His major directions of current work relate to performance analysis tools, programming models and resource management. His team distributes the Open Source BSC tools (Paraver and Dimemas) and performs research on increasing the intelligence embedded in the performance analysis tools. He is involved in the development of the OmpSs programming model and its different implementations for SMP, GPUs and cluster platforms.

Prof. Hiroaki Kobayashi

Professor of Graduate School of Information Sciences, Tohoku University, Japan

Hiroaki Kobayashi received his Ph.D in Information Engineering from Tohoku University in 1988. Since then, he has been a faculty member of School of Engineering and Graduate School of Information Sciences, Tohoku University. His research interests are in high-performance, low-power processor architectures, 3D chip architectures, parallel and distributed computing, supercomputing systems and their applications. He was Visiting Associate Professor of Stanford University in 1995, 1997, and 2000 to work with Professor Michael J. Flynn on low-power processor design. In 2008-2016, he was Director of Cyberscience Center of Tohoku University, which is one of 7 national supercomputer centers in Japan. He has been involved in many supercomputing projects such as “feasible study of a future HPC system for memory-intensive applications,” which was conducted under the national program for exascale computing by Ministry of Education, Culture, Sports, Science and Technology of Japan. In this project, he has designed a novel vector system with 3D die-stacking technology with NEC.

He is a member of Science Council of Japan. He has been the chair of Organizing Committee of COOL Chips, IEEE Symposium on Low-Power and High-Speed Chips since 2011.

Dr. Prof. Happy Sithole

Center for High Performance Computing, South Africa

Dr. Happy Sithole is the Director for the Center for High Performance Computing in South Africa. Dr. Sithole has a PhD in Physics, which focused on Atomistic and Electronic Simulation of Sulphide Minerals. Dr. Sithole has worked as a Senior Lecturer and Researcher in the Materials Modelling Center at University of Limpopo. He has also worked as a Research Scientist at De Beers Consolidated Mines, and later as a Senior Process Engineer at Pebble Bed-Modular Reactor Company. Dr. Sithole sits in a number of advisory committees of high performance computing, as a program committee member of both the International Super-Computing Meeting and the Russian High Performance Computing Committee. He also serves and inquisitor on the “Hot Seat” session at ISC Meetings, a select panel that interrogate technology vendors on their products.